Threshold voltage variation-immune FinFET design with metal-interlayer-semiconductor source/drain structure

Effect of Hydrogen Annealing on Contact Resistance Reduction of Metal-Interlayer-n-Germanium Source/Drain Structure

Design Optimization for Process-Variation-Tolerant 22-nm FinFET-Based 6-T SRAM Cell with Worst-Case Sampling Method

Amorphous Indium Zinc Oxide Thin-Film Transistor with Steep Subthreshold Slope by Negative Capacitance

Study of Random Variation in Germanium-Source Vertical Tunnel FET

Negative Capacitance Field Effect Transistor With Hysteresis-Free Sub-60-mV/Decade Switching

A compact effective-current model for power performance analysis on state-of-the-art technology development and benchmarking

Fermi-Level Unpinning Using a Ge-Passivated Metal-Interlayer-Semiconductor Structure for Non-Alloyed Ohmic Contact of High-Electron-Mobility Transistors

Surface Passivation of Germanium Using SF6 Plasma to Reduce Source/Drain Contact Resistance in Germanium n-FET

Negative Capacitance in Organic/Ferroelectric Capacitor to Implement Steep Switching MOS Devices