발행물
컨퍼런스
2000 IEEE International Solid-State Circuits Conference 47th Annual ISSCC
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A 7.1GB/s low-power 3D rendering engine in 2D array-embedded memory logic CMOS
A 330MHz low-jitter and fast-locking direct skew compensation DLL
Photonics Conference 2000
Low Cost CMOS IC in Optical Interconnections
IEEE European Solid-State Circuit Conference
A Novel High Speed Low Power Logic Family: Race Logic
A Single Bitline Writing Scheme for Low Power Reconfigurable I/O DRAM Macro