2001

,

120mW Embedded 3D Graphics Rendering Engine with 64Mb Logically Local Frame Buffer and 3.2GByte/s Run-time Reconfigurable Bus for PDA-ChipAuthor

2001

,

Low Power Motion Compensation Block IP with embedded DRAM Macro for Portable Multimedia ApplicationsAuthor

2001

,

480ps 64-bit Race Logic AdderAuthor

2001

,

A Reconfigurable Multilevel Parallel Graphics Cache Memory with75 GB/s Parallel Cache Replacement BandwidthAuthor

2001

,

Single Chip 3D Rendering Engine Integrating Embedded DRAM Frame Buffer and Hierarchical Octet Tree (HOT) Array Processor with Bandwidth AmplificationAuthor