발행물
컨퍼런스
ISSCC 2001
2001
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80/20MHz 160mW Multimedia Processor integrated with Embedded DRAM MPEG-4 Accelerator 3D Rendering Engine for Mobile ApplicationsAuthor
ISCAS 2001
A Comparative Analysis of a DDR-SDRAM, a D-RDRAM and a DDR- FCRAM Using a POPeye SimulatorAuthor
Design and Implementation of CMOS LVDS 2.5Gb/s Transmitter and 1.3Gb/s Receiver for Optical InterconnectionsAuthor
ISSCC 2000
2000
A 7.1GB/s Low Power 3D Rendering Engine in 2D Array Embedded Memory Logic CMOSAuthor
ESSCIRC 2000
A Novel High Speed Low Power Logic Family : Race LogicAuthor