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1
Survey and Evaluation of Converging Architecture in LLMs based on Footsteps of Operations
S. Kim, J. Moon, J. Oh, I. Choi, J.-S. Yang
IEEE Open Journal of the Computer Society, 2025
2
AGD: Analytic Gradient Descent for Discrete Optimization in EDA and its Use to Gate Sizing
P. Pham, T.-M. Park, S.-H. Cho, T. Mahmood, J.-S. Yang, J. Chung
ACM Transactions on Design Automation of Electronic Systems, 2025
3
Reducing Errors and Powers in LPDDR for DNN Inference: A Compression and IECC-Based Approach
J.-Y. Hong, J.-W. Jang, S.-H. Cho, Y. Kong, S. Kim, Y. Kang, J. Ko, J. Chung, J.-S. Yang
Journal of Systems Architecture, 2025
4
HYDRA: A Hybrid Resistance Drift Resilient Architecture for Phase Change Memory-Based Neural Network Accelerators
T. H. Nguyen, M. Imran, J. Choi, J.-S. Yang
IEEE Transactions on Computers, 2023
5
CRAFT: Criticality-Aware Fault-Tolerance Enhancement Techniques for Emerging Memories-Based Deep Neural Networks
T. H. Nguyen, M. Imran, J. Choi, J.-S. Yang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023
6
A convertible neural processor supporting adaptive quantization for real-time neural networks
H. Kal, H. Choi, I. Jeong, J.-S. Yang, W. Ro
Journal of Systems Architecture, 2023
7
EUNNet: Efficient UN-normalized Convolution layer for stable training of Deep Residual Networks without Batch Normalization layer
B. Nguyen, J. Choi, J.-S. Yang
IEEE ACCESS, 2023
8
Checkerboard Dropout: A structured dropout with checkerboard pattern for Convolutional Neural Networks
B. Nguyen, J. Choi, J.-S. Yang
IEEE ACCESS, 2022
9
CEnT: An Efficient Architecture to Eliminate Intra-array Write Disturbance in PCM
M. Imran, T. Kwon, N. Touba, J.-S. Yang
IEEE Transactions on Computers, 2022
10
ADAPT: A Write Disturbance Aware Programming Technique for Scaled Phase Change Memory
M. Imran, T. Kwon, J.-S. Yang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022
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