발행물

전체 논문

143

31

Design and analysis of edge detection algorithm in FPGA for high-speed image processing
K. Lee, Y. Kim
IEIE Transactions on Smart Processing and Computing (SPC), 2018

32

Junctionless Sandwiched-Gate Logic Design using Novel Device Structure
M. Ryu, Y. Kim
Journal of Semiconductor Technology and Science (JSTS), 2018

33

A Theoretically Sound Approach to Analog Circuit Sizing
E. Lim, J. Choi, Y. Kim
Journal of Semiconductor Technology and Science (JSTS), 2018

34

Analysis of 5-nm Circular and Trapezoidal Nanowires by using Three-dimensional Simulations
M. Han, Y. Kim
IEIE Transactions on Smart Processing and Computing (SPC), 2018

35

Analysis and Reduction of the Voltage Noise of Multi-layer 3D IC with Multi-paired Power Delivery Network
S. Kim, Y. Kim
IEICE Electronics Express, 2017

36

Efficient FPGA Implementation of AES-CCM for IEEE 1609.2 Vehicle Communications Security
C. Jeong, Y. Kim
IEIE Transactions on Smart Processing and Computing (SPC), 2017

37

High-resolution electrohydrodynamic inkjet printing of stretchable metal oxide semiconductor transistors with high performance
S. Kim, K. Kim, YH Hwang, J. Park, J. Jang, Y. Nam, Y. Kang, M. Kim, HJ Park, Z. Lee, J. Choi, Y. Kim, S. Jeong, B-S Bae, J-U Park
Nanoscale, 2016

38

Novel Adaptive Power Gating Strategy and Tapered TSV Structure in Multi-layer 3D IC
S. Kim, S. Kang, K. J. Han, Y. Kim
ACM Transactions on Design Automation of Electronic Systems (TODAES), 2016

39

Low-Power Fully Digital Voltage Sensor using 32-nm FinFETs
H.V. Nguyen, Y. Kim
IEIE Transactions on Smart Processing and Computing (SPC), 2016

40

Optimal Inverter Logic Gate using 10-nm Double Gate-all-around (DGAA) Transistor with Asymmetric Channel Width
M. Ryu, F. Bien, Y. Kim
AIP Advances, 2016