Impacts of Trapezoidal Fin of 20-nm Double-Gate FinFET on the Electrical Characteristics of Circuits

On-chip Interconnect Boosting Technique by Using of 10-nm Double Gate-All-Around (DGAA) Transistor

A Wide Range On-Chip Leakage Sensor Using a Current-Frequency Converting Technique in 65-nm Technology Node

Comprehensive Performance Analysis of Interconnect Variation by Double and Triple Patterning Lithography Processes

A performance analysis for interconnections of 3D ICs with frequency-dependent TSV model in S-parameter

A High Resolution and High Linearity 45 nm CMOS Fully Digital Voltage Sensor for Low Power Applications

Trapezoidal approximation for on-current modeling of 45-nm non-rectilinear gate shape

Intra-gate Length Biasing for Leakage Optimization in 45nm Technology Node

TSV Geometrical Variations and Optimization Metric with Repeaters for 3D IC

A novel methodology for speeding up IC performance in 32nm FinFET