발행물

전체 논문

167

41

AND Flash Array Based on Charge Trap Flash for Implementation of Convolutional Neural Networks
Hyun-Seok Choi, Hyungjin Kim, Hong-Ho Lee, Byung-Gook Park, Yoon Kim*
IEEE Electron Device Letters, 2020

42

Analysis of Channel Area Fluctuation Effects of Gate-All-Around Tunnel Field-Effect Transistor
Seok Jung Kang, Jeong-Uk Park, KyungJin Rim, Yoon Kim, Jang Hyun Kim, Garam Kim, Sangwan Kim*
Journal of Nanoscience and Nanotechnology, 2020

43

Surrounding Channel Nanowire Tunnel Field-Effect Transistor with Dual Gate to Reduce a Hump Phenomenon
Ye Sung Kwon, Seong-Hyun Lee, Yoon Kim, Garam Kim, Jang Hyun Kim, Sangwan Kim*
Journal of Nanoscience and Nanotechnology, 2020

44

Revisiting Stochastic Computing in the Era of Nanoscale Nonvolatile Technologies
Amogh Agrawal, Indranil Chakraborty, Deboleena Roy, Utkarsh Saxena, Saima Sharmin, Minsuk Koo, Yong Shim, Gopalakrishnan Srinivasan, Chamika Liyanagedera, Abhronil Sengupta, Kaushik Roy*
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2020

45

sBSNN: Stochastic-Bits Enabled Binary Spiking Neural Network With On-Chip Learning for Energy Efficient Neuromorphic Computing at the Edge
Minsuk Koo, Gopalakrishnan Srinivasan, Yong Shim, Kaushik Roy*
IEEE Transactions on Circuits and Systems I: Regular Papers, 2020

46

3-D Synapse Array Architecture Based on Charge-Trap Flash Memory for Neuromorphic Application
Hyun-Seok Choi, Yu Jeong Park, Jonh-Ho Lee, Yoon Kim*
MDPI Electronics, 2019

47

F-shaped tunnel field-effect transistor (TFET) for the low-power application
Seunghyun Yun, Jeongmin Oh, Seokjung Kang, Yoon Kim, Jang Hyun Kim, Garam Kim, Sangwan Kim*
Micromachines, 2019

48

Vertical Tunnel Field-Effect Transistor with Polysilicon Layer
Won Joo Lee, Hui Tae Kwon, Hyun-Seok Choi, Daehoon Wee, Yu Jeong Park, Boram Kim, Yoon Kim*
Journal of Nanoscience and Nanotechnology, 2019

49

Powerline Communication for Enhanced Connectivity in Neuromorphic Systems
Aayush Ankit*, Minsuk Koo*, Shreyas Sen, Kaushik Roy*
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019

50

Resistive Random-Access Memory with a-Si/SiNx Double-Layer
Hui Tae Kwon, Won Joo Lee, Hyun-Seok Choi, Daehoon Wee, Yu Jeong Park, Boram Kim, Sungjun Kim, Byung-Gook Park, Yoon Kim*
Solid State Electronics, 2019