Sung, J., Kang. S., Han, D., Kim, G., Son, M., Shin, C.
ACS Nano, 2024
163
Row Hammer-Induced D0 Failure Improvement in Sub-20 nm DRAM Using Air Gap
Yoon, J., Yoon, S., Ahn, J., Shin, C.
Semiconductor Science and Technology, 2024
164
Oxygen Reservoir Effect of Tungsten Trioxide Electrode on Endurance Performance of Metal-Ferroelectric-Metal Capacitors for FeRAM Applications
Choi, Y., Shin, J., Min, J., Moon, S., Chu, D., Han, D., Shin, C.
Scientific Report, 2024
165
Taper-angle-induced variation in n/p-stacked vs. p/n-stacked CFET
Jang, E., Kim, M., Shin, C.
IEEE Transactions on Electron Devices, 2024
166
Variation-aware analysis of buried-channel-array transistors (BCATs) in scaled DRAM: insights from 3D quasi-atomistic simulations
Yoon, S., Yoon, J., Shin, C.
Semiconductor Science and Technology, 2024
167
Buried power rail to suppress substrate leakage in complementary field effect transistor (CFET)
Jang, E., Lim, J., Shin, C.
Nano Express, 2024
168
Device Design Guidelines to Boost up AC Performance of CFET (Complementary Field-Effect-Transistor)-Based Inverter
Lim, J., Han, D., Sung, J., Yoon, S., Kang, S., Kim, G., Bacc, H., Shin, C.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2025
169
Study of 3D Line Edge Roughness (LER) in Vertical Channel Array Transistor for DRAM
Lim, J., Yoon, S., Sung, J., Kang, S., Kim, G., Bacc, H., Shin, C.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2025
170
Investigation of the Switching Mechanism in the Bipolar and Complementary Resistive Switching of HfOx-Based Resistive Random-Access Memory through Rapid-Thermal-Annealing-Induced Grain Boundary Engineering