Vacuum Inner Spacer to Improve Annealing Effect during Electro-Thermal Annealing of Nanosheet FETs

N-Type Nanosheet FETs without Ground Plane Region for Process Simplification

Impact of Iterative Deuterium Annealing in Long-Channel MOSFET Performance

Power Reduction in Punch-Through Current-Based Electro-Thermal Annealing in Gate-All-Around FETs

Demonstration of Multi-layered Macaroni Filler for Back-Biasing-Assisted Erasing Configuration in 3D V-NAND

MoS2 전 용액공정을 통한 Physically Unclonable Function 구현

Impact of Dielectrics in SOI FinFET for Lower Power Consumption in Punch-through Current-based Local Thermal Annealing

Current annealing to improve drain output performance of beta-Ga2O3 field-effect transistor

Dielectric Engineering to Suppress Cell-to-Cell Programming Voltage Interference in 3D NAND Flash Memory

Gateless and Capacitorless Germanium Biristor with a Vertical Pillar Structure