,

Analysis of noise isolation methods on split power/ground plane of multi-layered package and PCB for low jitter mixed mode system

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Open Load Backward Matching (OLBM) Technique for Low ISI Differential H-tree Clock and Data Transmission

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Compensation of ESD and Input Capacitance Effect by Using Package Bond-wire Inductance for Over Gbps Differential SerDes Devices

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Coupling of through-hole signal via to power/ground resonance and excitation of edge radiation in multi-layer PCB

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Suppressed carrier clock for reduction of electromagnetic radiated emission from high-speed digital system