A single event upset tolerant latch design

Modeling and analysis of single-event transient sensitivity of a 65 nm clock tree

Signal characteristic and test exploitation for intermittent nanometer-scale cracks

Study of TID effects on one row hammering using gamma in DDR4 SDRAMs

Study of proton radiation effect to row hammer fault in DDR4 SDRAMs

BPPT?Bulk Potential Protection Technique for Hardened Sequentials

A Quatro-Based 65-nm Flip-Flop Circuit for Soft-Error Resilience

Resource-Efficient SRAM-Based Ternary Content Addressable Memory

Soft error study on DDR4 SDRAMs using a 480 MeV proton beam

An alternative approach to measure alpha-particle-induced SEU cross-section for flip-chip packaged SRAM devices: High energy alpha backside irradiation